INTRODUCING | The 18SCT005A, a high-voltage monitor capable of 1200V at 0.7% accuracy.
INTRODUCING
The 18SCT005A, a high-voltage monitor capable of 1200V at 0.7% accuracy
Alain R. Comeau, IEEE Transactions on Semiconductor Manufacturing, Vol. 3, No. 2, May 1990.
Alain R. Comeau and Normand Nadeau, IEEE Transactions on Semiconductor Manufacturing, Vol. 4, No. 2, May 1991.
Alain R. Comeau, Journal of Electrochemical Society, Vol. 139, No. 5, May 1992
The addition of a ramped nucleation cycle, just after an initial oxidation, is shown to greatly increase the precipitation of interstitial oxygen during simulated processing on N/N+ antimony doped epitaxial wafers. When used with fully processed wafers, the ramped nucleation improves internal gettering. Oxygen precipitate density and bulk stacking fault density achieved are about a factor of 100 higher when using ramped nucleation. These results indicate that N/N+ antimony doped epitaxial wafers have an intrinsic gettering capability as good as that of lightly doped material when using an activation cycle (initial oxidation) and subsequent ramped nucleation. A method for calculating bulk stacking fault density is presented. It is shown that, at high concentration (above 107 cm−3), the square of the bulk stacking fault length is inversely proportional to their density. This finding indicates that the growth of bulk stacking faults is limited by the supply of interstitial silicon generated in the bulk during oxygen precipitate growth.
Alain R. Comeau, and Jacques Laneuville, IEEE Transactions on Semiconductor Manufacturing, Vol. 5, No. 3, August 1992.
A test chip (named Yieldchip) was designed, simulated, fabricated, and tested on a 3- mu m process. The layout of the Yieldchip’s cells enables the test program to electrically locate and identify active faults, thereby automating the, classification of defects. The Yieldchip can detect more than one defect per circuit in most circumstances. The algorithm can identify the 21 simple defects of the cells and can be used as an expert system to extend this list. Unidentified detectable faults are flagged at all times and located if possible.
How SimpleChips designs high-voltage silicon for systems that must perform reliably over decades